Hardware Implementation of an Approximate Simplified Piecewise Linear Spiking Neuron

Artificial intelligence has revolutionized image and speech recognition, but the neural network fitting method limitations. Neuromorphic chips that mimic biological neurons can better simulate brain’s information processing mechanism. As basic computing component of new neuromorphic network, unit’s design implementation have important significance; however, complex dynamical features come with a high computational cost: approximate unique advantages, in terms optimizing cost networks, which solve this problem. This paper proposes hardware an spiking neuron structure, based on simplified piecewise linear model (SPWL), to optimize power consumption area. The proposed structure achieve five major generation patterns. was synthesized compared similar designs, evaluate its potential advantages results showed had lowest fastest computation speed. A typical constructed, test usability SPWL model. could work normally achieved accuracy 94% MNIST dataset.